Silicon Oxidation

Thermal Oxidation of Silicon

CMOS-compatible quartz furnace processes (Centrotherm), try and wet oxidation 100 and 150mm wafer size, batch quantity: up to 50 wafers per run.

	LOCOS oxide (LPCVD nitride mask layer)
	Gate Oxide, standard thickness 40 nm
	Field Oxide, standard thickness 1000 nm
	Cusomized Oxide layers possible, thickness range 10 nm up to 1500 nm

thickness non-uniformity across wafer: <2%
average thickness non-uniformity wafer-to-wafer: <3%
average thickness non-uniformity batch-to-batch: <5%